simulate.0.override (shared by simulate + simulate-repl): dzn-simulate STATE-DISPLAY
ARTIFACT, nucleos canonical. Sanctioned per-model (granted permission for state-display
divergences proven wrong via `dzn graph -b state`).

The requires interface IMulti has a MULTI-OUT spontaneous group:
  [s.A] on inevitable: { a; b; s = S.I; }
The component reacts `on m.a:{}` / `on m.b:{p.done}`.

EVIDENCE nucleos is canonical:
- `dzn graph -b state -m spont_multi_out` is ATOMIC — only TWO quiescent states:
  state2 {p:busy=true, m:s=S:A} --(m.a / m.b / p.done)--> state1 {p:busy=false, m:s=S:I}.
  There is NO quiescent state with the queue partially populated; the trailing
  assignment `s=S.I` commits as part of the one atomic RTC.
- nucleos's OWN lts.aut encodes the canonical order: m.a (emit) -> m.b (emit) ->
  m.<flush> -> m.qout.a (deliver) -> m.qout.b (deliver) -> p.done -> p.<flush>. Both
  out-events are queued, THEN flushed, THEN delivered in order. lts/verify PASS
  (wf-equal to dzn).

THE ONLY DIVERGENCE (override is byte-identical to dzn's simulate.0 except 2 lines):
the two queue-in state lines. dzn-simulate's per-communication checkpoint HOLDS the
pre-assignment value `m.s = S:A` across the separate queue-in display lines (lagging
the commit by one communication) — a display artifact of dzn-simulate's per-event
checkpoint rendering (it also shows the queue one step late). nucleos commits the
trailing assignment at the flush and renders `m.s = S:I` throughout the queue phase,
the canonical RTC-exit value confirmed by the atomic graph above.
